The ideal candidate is a digital designer who wants to pursue an exciting opportunity in the following diverse areas:
• Development of IP-level models/views and ownership of a formal release process for deliverables that will be used on various SOCs. The models that will involve development include behavioral models, verilog blackboxes, CLP models, IR drop models, extracted timing models (.libs), LAFF, etc. for various Analog IPs. • Implement Design for test (DFT) strategy during IP development ...
Texas Instruments - 4 months ago
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