Engineer, Staff Verification
Marvell - Santa Clara, CA

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  • BS/MS/PHD EE, or CE.
  • 9+ years of design verification experience with advance verification methodology such as System Verilog, SVA, VMM and/or OVM
  • Strong working knowledge of UNIX environment and Revision Control tools.
  • Excellent debug skills with simulation testbenches.
  • Familiarity with system architecture, memory organization hardware architecture, and bus protocols such as USB, AXI, PCIE, and SATA.
  • Gate level simulations with VCS, ModelSim or NCSim.
  • Familiarity with other verification related tools such lint, formal property verification.
  • Strong communication skills, leadership and presentation skills.
Description:
The SoC platform team is an exciting, rewarding and dynamic group, providing many opportunities for professional growth for a motivated candidate. The SoC platform team provides opportunities to design verification IP, build FPGA prototypes, pre-Silicon models targeted for FPGAs, emulators and design validation boards. We report to the CTO office and define and drive methodologies across Marvell. This position is in an exciting and challenging technical environment as a senior Staff Verification engineer. The individual will work closely with design teams working on IPs and SoC test chip development projects based on embedded ARM and DSP processor architectures.

Responsibilities include:
Design and develop advance verification environment for IPs and SoC test chips using state-of-the-art IC verification tools, methodologies and flows.
Perform verification tasks for IPs and SoC test chips, including development of test plan, reusable test bench, and verification methodology as well as tests creation.
Work with FPGA/Emulation team to perform pre-silicon validation/debug at IP, full-chip and system levels, fullchip integration, and Silicon debug.
This position requires reading architecture specification, micro-architecture specifications, implementing verification environment models, performing the functional and gate level verification of the ASICs.
The position also requires working with product engineering teams in different business units by supporting training and deploying company-wide design verification methodologies and flows.

Profession:
Engineering - Hardware

Discipline:
Design Verification

Marvell - 18 months ago - save job - block
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Thou marvell'st at my words, but be thee still; Marvell Technology Group offers digital and mixed-signal integrated circuits for data...