- Circuit design of SRAM test chips for process development.
- Apply ASIC/SoC design flow to test chip development.
- Synthesis, floor planning, place & route, and timimg closure.
- Circuit design of SRAM IP macros.
- Chip logic verification.
- Write test specifications and data sheets.
- Interface with customers on circuit design and test chip issues.
- Minimum 5 years of circuit design in advance CMOS technology.
- Synopsys EDA tools (Verilog, Prime Time, IC Compiler)
- Worked on SPICE/HSIM simulations and Cadence schematic/layout environments.
- Experience in LVS debug of very large circuits (CALIBRE, HERCULES, x-Calibre, star-RCXT)
- Able to analyze and fix DRC errors in circuit layout.
- Hands-on experience in design lab equipments.
- Cadence Skill code knowledge.
- Good skill in writing Perl scripts.
- Past working experience in a fab foundry is also a plus.
- BS required, MS preferred.
GLOBALFOUNDRIES is the world's first full-service semiconductor foundry with a truly global manufacturing and technology footprint. Launched in March 2009 through a partnership between AMD [NYSE: AMD] and the Advanced Technology Investment Company (ATIC), GLOBALFOUNDRIES provides a unique combination of advanced technology, manufacturing excellence and global operations. With the integration of Chartered in January 2010, GLOBALFOUNDRIES significantly expanded its capacity and ability to provide best-in-class foundry services from mainstream to the leading edge.
GLOBALFOUNDRIES is headquartered in Silicon Valley with manufacturing operations in Singapore, Dresden, and a new leading-edge fab under construction in Saratoga County, New York. These sites are supported by a global network of R&D, design enablement, and customer support in Singapore, China, Taiwan, Japan, the United States, Germany, and the United Kingdom.
For more information on GLOBALFOUNDRIES, visit www.globalfoundries.com
GLOBAL FOUNDRIES is an Equal Employment Opportunity/Affirmative Action (EEO/AA) employer Minorities/Female/Disabled/Veteran (M/F/D/V).