Facilitate global wafer probe coordination and best practices (working with offshore sub-cons and internal factories)
Coordinate Dynamic PAT probe and Pattern Recognition Systems implementation. Summarize and evaluate constraints and limitations of existing probers with data analysis software.
Improve/control the output product quality at wafer probe. Identify the parameters that Statistical Bin Limits (SBL) should be applied. Maintain and implement pre-PAT and PAT Limits. Add/improve screening tests by introducing advanced screening algorithms and methods. Participate early in new product reviews using “Design For Test (DFT)” methods. Use Gauge RnR and other methods to monitor and control measurement quality.
Unify Probe Data and Flow. Unify test bin classification and test output file format. Improve methods to combine the failure bins from the tester, advanced screening and visual inspection, and generate the final wafer inkless map.
Manage the overall cost of wafer probe. Employ advanced multi-site testing methods, standardize probe test hardware and coordinate coverage between PCM, Probe and Final Test.
Project management tools and knowledge.
Position requires experience in wafer probing and yield improvement for semiconductor industry. BSEE degree and a minimum of 10 years experience is related field.
Skyworks Solutions - 2 years ago
Skyworks Solutions, Inc. is an innovator of high performance analog semiconductors. Leveraging core technologies, Skyworks supports...