This is a opportunity to work with an experienced digital IC team working on challenging designs in advanced CMOS technology nodes. The Engineer will perform all aspects of SOC implementation from logic synthesis to foundry tapeout, including floorplanning, placement, routing, timing optimization, signal integrity analysis, and physical, electrical, and formal verification, using a Cadence tool flow.
Minimum qualifications are a BSEE and 2-3 years of relevant work experience; preferred qualifications are a BSEE with 4-5 years of relevant work experience or an MSEE with 2-3 years of relevant work experience
- Experience with RTL-to-GDS digital IC design tools
- Experience with 90nm or smaller CMOS process technologies
- The candidate should exhibit strong verbal and written communications skills
Cadence is the global leader in software, hardware, and services that is driving the transformation of the electronic design automation (EDA) industry. This application-driven approach for creating, integrating, and optimizing designs helps customers realize Analog & Digital ICs , System-On-Chip devices, IP and complete systems at lower costs and with higher quality.
Cadence is an equal opportunity employer and is committed to hiring a diverse workforce.
Back to top