As a Senior Application Engineer at Cadence you will consult with customers on Industry leading Design IP products. The role will require you to participate in customer evaluations to demonstrate the applicability and integration of Cadence’s industry leading Design IP portfolio. The candidate must have a strong background in design flow from Architecture, Micro architecture, implementation, Synthesis and timing. Design experience in PCIEe, Ethernet, Memory, High speed I/O is desirable
Strong team player with a wiliness to learn new skills and application areas.
BSEE or equivalent required with 7+ years of relevant experience
Strong Verilog Skills
Strong interest and understanding of design methodologies
Knowledge of, experience with or project background in Verilog simulation (using Incisive, VCS, Questa, or similar), Synopsys DesignCompiler, Synopsys PrimeTime, perl, TCL and UNIX shell scripting
Ability to understand system-level implications (hardware, firmware, software, and interaction with CPUs and other modules) of IP decisions
Strong problem solving skills
MUST HAVE CURRENT US WORK AUTHORIZATION
This is one of the hottest positions in all Cadence right now , for more info please contact Don Galloway , Cadence Staffing at 727-868-2530 , email firstname.lastname@example.org
All inquiries and responses are held in strictest confidence.
Principals only, no agency or search referrals will be honored!
Cadence is the global leader in software, hardware, and services that is driving the transformation of the electronic design automation (EDA) industry . This application-driven approach for creating, integrating, and optimizing designs helps customers realize silicon chips, system-on-chip devices, and complete systems at lower costs and with higher quality.
Cadence is an equal opportunity employer and is committed to hiring a diverse workforce.
Back to top