- Minimum Bachelors degree in an engineering or computer science discipline
- Minimum 3 years engineering experience
Scope of Responsibility/Expectation:
The VIS Programmer Engineering Department develops leading
edge professional video encoding/transcoding technology
(MPEG2 and MPEG4) for programmers (satellite), cable, and
Successful candidate will implement complex video and packet processing using FPGAs,
from concept to production.
Adhere to the FPGA team’s process for source code documentation, coding style, and source control.
Generate code for target device and for scripted/automated test benches. Document all designs and provide support as needed to other teams.
Design for reuse and test. Responsible for unit test of FPGA mounted on board,
including FPGA to board interfaces.
Participate in the team’s design reviews and system integration.
- BSEE and 3 years FPGA design
- FPGA design skills:
Experience with Xilinx (Spartan/Virtex) and/or Altera (Arria/Cyclone) devices and design entry with Verilog or VHDL.
Verilog experience is preferred.
Multiple clock domains. Serdes and clock forwarded high
speed interfaces. EMIF.
IP Cores: PCIe, Ethernet MAC, DDR2 memory I/F
Embedded Systems: Altera: SOPC/Qsys/Nios, Xilinx: EDK/PowerPC/MicroBlaze
Test/Verification: Unit, board level, system level, test bench
development, automated simulation/verification, run time test
Processing: DSP, packet processing, switch fabric, video application layer processing, encapsulation, classification, traffic management.
- Theoretical knowledge of Digital Communication Systems, Signals and Systems, EMC Theory
- Familiarity with Networking concepts and design
- Must have excellent communication and organizational skills, good teamwork attitude and attention to detail.