1. MS or BS with over 10 years overall experience in verification on CPU design projects. Must have 3 plus management experiences of managing CPU verification teams.
2. Familiar with microprocessor architectures (pipeline design, superscalar, cache coherency and multiple-processor protocol).
3. Must be Verilog literal and be able to do first hand RTL debug. Hands-on experience in assembly programming languages, ARM assembly preferred.
4. Skillful at scripting. No language barrier.
5. Fluent communication in both written and spoken English.
This Sr. Verification Manager will be a member of the design team for the next-generation Marvell CPU targeted for the handheld and embedded server market. The candidate will be responsible for pre-silicon verification:
• Manage, coach and bring up verification engineers in order to provide verification service to the logic design team.
• Maintain and improve existing verification flow and methodology. Also, work with CAD tool vendors to keep up the latest verification trend.
• Analyze coverage gaps and devise strategies to fill coverage holes.
• Build up verification environment, including development of test benches and test generators for block-level and processor-level simulation.
• Work with logic design team in creating microarchitecture spec and provide testplans.
Engineering - Hardware
Thou marvell'st at my words, but be thee still; Marvell Technology Group offers digital and mixed-signal integrated circuits for data...