Validation Engineers with System Verilog expertise
Korcomptenz Inc - Folsom, CA

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Experience in defining, implementing and deploying verification capabilities and methodologies
• Expertise in System Verilog, Perl scripting, and VCS simulator
• Strong experience with architecting optimized validation environments, testplan/testbench/bus-functional-models/checkers/trackers/functional coverage development, and test writing/debug
• Working knowledge of UNIX, and Windows
• AVM knowledge Good to have:
• Familiarity with Graphics concepts, credit-based protocols, power-management flows
• Experience with Java and C/C++ is a plus

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