Asic Verification Engineer jobs in San Jose, CA

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Application Engineer (Emulation, EDA)- 4348
Mentor Graphics 38 reviews - Fremont, CA
Chip/ASIC design or verification experience - knowledge of System Verilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug....
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LTE R&D Electrical Engineer (Senior or Principal)
Sandia National Laboratories 78 reviews - Livermore, CA
Experience with formal verification of digital designs. Experience in digital design for FPGAs or ASICs, simulation, bench-top testing....
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Sr. Software Engineer (C++, Verilog, VHDL)
Mentor Graphics 38 reviews - Fremont, CA
Software Engineer to work in the Static Verification group in the Design, Verification & Test (DVT) Division....
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ASIC Design Verification Engineer

Sibridge Technologies 3 reviews - Santa Clara, CA 95054
Responsible for completing verification of projects for ASIC solutions group. Participate in coverage implementation and analysis, architect verification...
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ASIC Design Engineer

Stem Xpert - Santa Clara, CA
ASIC Design Verification Engineer. Developing scripts in automating the ASIC or SoC design flow. Santa Clara, CA....

Verification Engineer

Ciena 33 reviews - San Jose, CA
As the Verification Engineer, you will be responsible for various tasks including but not limited to:. Experience in verification using random and directed...

ASIC Design Verification Engineer

Logicbulls Inc. - Santa Clara, CA
4+ years exp hardware design or verification. Leading a small team of engineers through any of the above....
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Junior ASIC Design Verification Engineer

Themesoft INC - San Jose, CA
ASIC/FPGA Verification Engineer. Junior ASIC Design Verification*. 5 years ASIC/FPGA verification experience....
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ASIC Verification Engineer at CSI

CSI 163 reviews - Santa Clara, CA
ASIC Verification Engineer. We are looking for ASIC Verification Engineer for our client in Santa Clara, CA. Bench level silicon verification experience....
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Cache Protocol ASIC Verification Engineer

Atria Logic, Inc. - Sunnyvale, CA 94085
ASIC Verification Engineer:. MESI Cache Coherency Verification prior experience a MUST. 3-5 yrs industry experience with SystemVerilog and UVM....
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Design Verification Engineer

Arteris - Campbell, CA 95008
DESIGN VERIFICATION ENGINEER*. Strong experience developing verification infrastructure using UVM. Formal verification experience writing properties and...
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ASIC Digital Verification Engineer-III

MindLance - San Jose, CA
Design, implementation and verification of communication ASICs:. 5 or more years’ experience on design, implementation and verification of communication ASICs....
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ASIC Design Verification Engineer

Calsoft Labs 6 reviews - Santa Clara, CA
Developing and deploying new verification methodologies, performing assertions, simulation, and constraint/HVL-based verification....
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Associate Rotation Engineer - MED
Mentor Graphics 38 reviews - Fremont, CA
Coursework/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional verification methodology, for...
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Engineer salaries in San Jose, CA

$119,664 per year

24.0% higher than national average

$89,043 $160,816
Common

Salary data based on 27 employees and 396 jobs