Principal Asic Verification Engineer jobs in Santa Clara, CA

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Principal Software Engineer

Cadence Design Systems 30 reviews - San Jose, CA
Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ space and have delivered great QoR on these platforms....

Sr Principal Verification Engineer

Broadcom 154 reviews - San Jose, CA 95134(North San Jose area)
Sr Principal Verification Engineer. Participating in the verification processes of L2/L3 Network Switching and routing ASICs and various subsystems within these...

Engineer, Principal- IC Design

Broadcom 154 reviews - San Jose, CA 95134(North San Jose area)
Engineer, Principal- IC Design. Participating in the verification processes of L2/L3 Network Switching and routing ASICs and various subsystems within these...

Senior Staff / Principal Design Engineer

InvenSense 4 reviews - San Jose, CA
Work with the verification team in providing verification requirements and debugging and root causing issues. Minimum MSEE + 10 Years (or PhD + 7 Years) of ASIC...

Principal Verification Engineer

Intrinsix - Silicon Valley, CA
Principal Verification Engineer (PVE):. Candidate will help architect, specify, and lead the implementation of verification projects using high level...
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Sr. Principal Physical Design Engineer

Cadence Design Systems 30 reviews - San Jose, CA
Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification, physical verification, DFM....

Senior/Principal Hardware Design Engineer

Avalanche 5 reviews - Fremont, CA
Participate in verification planning and execution. We are seeking a Senior Hardware Design engineer who will be responsible for developing and executing on...

Principal ASIC Verification Engineer

OCZ Storage Solutions - San Jose, CA 95119(Santa Teresa area)
12+ years for a Principal Engineer role. Modules verification and/or full chip verification. He/she will mainly perform verification of sub....

Principal Emulations Tool/Flow Engineer

Broadcom 154 reviews - Santa Clara, CA 95054
Principal Emulations Tool/Flow Engineer. Emulation tools/flow Engineer. Closely work with RTL/verification engineers for debug and root-cause....

Sr Application Engineer

Cadence Design Systems 30 reviews - San Jose, CA
S tandard Cell / Memory Library Characterization Methodology Engineer. Principals only, no agency or search referrals will be honored!...
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Lead Services AE, Library and Memory Characterization
Cadence Design Systems 30 reviews - San Jose, CA
Position Description Standard Cell / Memory Library Characterization Methodology Engineer. Memory characterization, back end layout and physical verification...
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