Senior Asic Verification Engineer jobs in San Mateo, CA

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Senior Application Engineer - Emulation
Mentor Graphics - 45 reviews - Fremont, CA 94538
Chip/ASIC design or verification experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug....
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Sr. Emulation Application Engineer
Mentor Graphics - 45 reviews - Fremont, CA 94538
Chip/ASIC design or verification experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug....
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Senior RTL Design Engineer
Xilinx, Inc - 8 reviews - San Jose, CA 95101
Experience with all stages in the ASIC design flow including verification methodologies and tools (UVM/OVM, Formal Checks, LINT tools, etc)....
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Sr. ASIC/ Layout Design Engineer

Advanced Micro Devices, Inc. - 244 reviews - Sunnyvale, CA
As DFT liaison engineer, your responsibilities are:. Implementation and verification of DFT architecture and features....
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SMTS ASIC/ Layout Design Engineer

Advanced Micro Devices, Inc. - 244 reviews - Sunnyvale, CA
Technical lead of five to eight senior level engineers. Great opportunity to be part of the world-class GPU/Fusion chip development team at AMD Sunnyvale for...
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Senior ASIC DFT Engineer

Stanford Technology Solutions LLC - San Francisco Bay Area, CA
Work with Test Engineer and Product Engineer team to understand testability requirement for zero-defect. Understand Test Modes implementation and verification,...
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Senior ASIC Physical Design Engineer

Stanford Technology Solutions LLC - San Francisco Bay Area, CA
ASIC Physical Design:. Experience in Mentor caliber tools to run Physical verification. Must possess 5 to 10years of hands on experience in the Hardmacro...
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Senior Verification Engineer - SoC Integration (Sunnyvale)

Encore Semi - Sunnyvale, CA
Senior Verification Engineer - SoC Integration. Strong pre-si verification experience including using both C/C++ and SystemVerilog/UVM verification environments...
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ASIC & FPGA Verification Engineer Senior

Lockheed Martin - 3,499 reviews - Sunnyvale, CA
ASIC and FPGA verification. Previous ASIC or FPGA verification experience. Devise a specific verification plan for ASIC or FPGA following LMSSC's process....

Applications Engineer, Sr I

Synopsys - 64 reviews - Mountain View, CA 94043
The Senior Applications Engineer in the Technical Support & Training group is responsible for timely identification and resolution of customer issues,...

Sr. Emulation Application Engineer

Mentor Graphics - 45 reviews - Fremont, CA 94538 (Irvington area)
Chip/ASIC design or verification experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug....

Sr. Corporate Applications Engineer

Synopsys - 64 reviews - Mountain View, CA 94043
Has a strong understanding of ASIC design flow, VLSI, and/or CAD engineering. Frequently networks with senior internal and external personnel in own area of...

Sr. ASIC Design Verification Engineer

Aquantia Corp - San Jose, CA 95134 (North San Jose area)
Full understanding of digital design verification methodologies and tools including:. Expertise in creating verification infrastructure using higher level...
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Senior Design Engineer
Xilinx, Inc - 8 reviews - San Jose, CA 95101
Experience with all stages in the ASIC design flow including verification methodologies and tools (UVM/OVM, Formal Checks, LINT tools, etc)....
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Senior Application Engineer - Design For Test (DFT )
Mentor Graphics - 45 reviews - Fremont, CA 94538
Simulation and verification expertise. Experience with design, simulation, verification of ASIC/VLSI/SoC circuits and systems, design verification and product...
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