Electronics Technician with over 21 years experience in various testing and stress platforms including large systems group and semi-conductor group on various types of equipment, processes, and products. Known for maintaining a positive work attitude and excellent working relationships, including Technicians, Manufacturing Engineering groups, Manufacturing Operators and Management. Successful working alone or with others. Flexible and experienced with a variety of work schedules including nights, 12-hour shifts, overtime, and weekends as well as extra time needed to meet deadlines and shipping schedules.
Senior Test Technician
1997 to 2012
Worked in test environment on various IBM Large Mainframe Systems. Responsible for isolating test failures to component level including chip level, power components, memory card, boards, I/O etc. Wrote defect reports on any isolated component failures found and called out repair actions on those components.
• Worked with Manufacturing Engineering group using test programs created and owned by Engineering Group.
• Used GEM test interface to run test programs and to write up defect reports on isolated component failures.
• Ran test operations to stress test hardware components / systems for reliability issues.
• Used custom temperature controlled chambers to stress systems / components under conditions of extreme temperature conditions of hot and cold.
• Stressed components / systems using various voltage biasing conditions, temperature conditions, error injections through test operations.
• Interacted with Engineering almost daily on any test programming errors and on any new product testing.
• Worked with Engineering group to run experiments on new test programs or / and on special experiments on new components / systems.
• Cross-trained on different Mainframe product lines.
• Installed test components for testing and removing tested components for customer ships.
• Performed system alterations (customer order changes), including memory upgrade, I/O upgrades, etc.
Sr. Manufacturing Technician
1990 to 2012
Test Technician in Defect Analysis
1992 to 1997
Performed engineering test programs on large system mainframes (Bipolar Chip s390); isolating test fails to chip level and ran test programs for early-life fall-out and reliability.
Quality Control Technician
1990 to 1992
In clean room environment, inspected chip bonding to substrates using high powered microscopes. Performed incoming inspections, outgoing inspections, and wire bond inspections.
Associates in Engineering Science
• Multiple Tool Sets Experience • ISO-9000 and […]
• CMOS Chip Level Test • 5-S, and CFM Concepts
• Electrostatic Device Training • Asset Protection Training
• Word, Excel and Lotus Notes Proficiency • Customer Relations
• Troubleshooting Advanced Large Mainframe Computers (IBM) • Analog and Mixed Signal and Memory Testing Devices