Job Description: Key responsibilities will be to create high speed cell and block level custom layout designs using industry leading tools and technologies. Apply analog layout practices and DFM techniques to create high quality layout designs. Perform RC extractions and EM analysis to ensure quality standards are realized. Work closely with senior team members and design engineers. Judgment is required in resolving moderately complex problems.
-Bachelors in Electrical Engineering or Electrical Engineering Technology
-2 years of custom analog layout design experience in leading CMOS processes
-Experience in high-speed custom layout
-Proficient in analog layout and verification
-Understanding of ESD, lithography, EM, antenna effects, DFM and manufacturing challenges (utilizing tools such as Totem, RedHawk, etc.)
-Excellent oral and written communication skills
-Ability to contribute and work in a team setting
Mar 27, 2013
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to final test and optimization, and lastly packaging. Employees in the Technology and Manufacturing group are part of a worldwide network of manufacturing and assembly/test facilities.
We will accept applications/resumes until 60 days after posting date or earlier at Intel's discretion
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