Principal CMOS RFIC Design Engineer
Quantenna Communications, Inc. - Fremont, CA

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Key member of a world class RFIC design team designing cutting-edge CMOS RF integrated circuits for ultra-high performance carrier-grade MIMO systems Requirements:
  • Masters EECS strongly desired. MSEE considered for outstanding candidates. Outstanding work in RF design required
  • 5+ years of work experience with CMOS RF in &l
  • t; 90nm Systems knowledge of OFDM, MIMO, and self-calibrating RF systems
  • Expert in Cadence Virtuoso tool-suite
  • Experience taking your chip designs into high-volume production. Deep understanding of simulation and DFM for high-yield, high-volume manufacture
  • Solid lab experience
  • Superb at working hands-on with test team to supervise tests and characterize the performance of your designs
Please forward your resume to Please include the job title “Principal CMOS RFIC Design Engineer” in the subject.

About this company
Quantenna is a leading developer of 802.11ac and 802.11n Wi-Fi semiconductor solutions that deliver the performance, speed and reliability...