SCDC Engineering Internship - 702662
Intel - Santa Clara, CA

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SCDC Engineering Internship - 702662 Description Job Description: Responsibilities may be quite diverse of a nonexempt technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school. Candidate will be a member of Backend (Physical Implementation) Team within Server CPU Design Group (within Intel Architecture Group). Candidate will be involved in design, verification and layout of special circuits such as high-speed I/O buffer, SRAM and PLL cells for use in integrated circuit design. Candidate will be expected to work closely with a team of circuit design engineers and mask design technicians to develop the layout of special circuits and verify their electrical characteristics. Design tasks include specification, planning, schematic generation, circuit simulation, timing analysis, design reviews, layout supervision and coordination of final application of circuits in chip level layout. The position requires an in-depth understanding of CMOS technology , logic circuits, CMOS layout, device physics, design CAD tools, circuit reliability, and signal integrity. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications: - Must be pursuing a BS degree in Electrical Engineering, Computer Engineering or Computer Science - Must have the unrestricted right to work in the US without requiring sponsorship - Minimum of 3 months experience with software/programming languages (i.e. C, C++, C#, Visural.NET/Bacis, Perl, Java, etc.) Preferred Qualifications: - Minimum of 3 months experience with CMOS technology and layout - Minimum of 3 months experience withlogic circuits - Minimum of 3 months experience withdevice physics - Minimum of 3 months experience withdesign CAD tools, circuit reliability - Minimum of 3 months experience withsignal integrity
      Job Category : Engineering
      Primary Location : USA-California, Santa Clara

      Full/Part Time : Full Time
      Job Type : Student/Intern
      Regular/Temporary : Temporary
      Posting Date : Jan 12, 2013
      Apply Before : Mar 29, 2013

      Business Group Employees in the Intel Architecture Group (IAG) deliver innovative platforms across computing and communication segments including data centers, mobile and desktop personal computers, handhelds, embedded devices and consumer electronics. Intel's industry leading technology is used to create integrated hardware and software solutions such as processors, chipsets, communication radios, graphics processors, motherboards, and networking components that deliver capabilities from security and manageability to computing performance and energy efficiency. IAG employees are at the forefront of enabling a new era of computing that is more integrated into all aspects of our daily lives.
      Posting Statement : We will accept applications/resumes until 60 days after posting date or earlier at Intel’s discretion. Intel invites people of all ages currently enrolled in an academic institution (or graduated within the last 18 months) to apply.

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