This position will be part of SoC Tool and IPs Labs in Integrated Platform Research at Intel. The responsibilities involve research on power modeling of IPs and development of algorithm to abstract power information into TLM level to enable power analysis with Virtual Platform. The intern will work with seniors, estimate the Soft IP's power, identify power states, and develop algorithms for automatic power modeling. The candidate will be expected to publish research results. Behavioral traits for this position include: problem solving skill, ability to communicate and present technical findings.
The candidate should be pursuing Ph.D in Computer Science, Computer Engineering, Electrical Engineering or relevant disciplines.
Candidate must have 1+ years of work or educational experience with the following:
-Experience on RTL level power estimation
-Knowledge of Verilog and SystemC languages
-Good understanding of power modeling
Feb 14, 2013
May 31, 2013
Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.
We will accept applications/resumes until 60 days after posting date or earlier at Intel’s discretion. Intel invites people of all ages currently enrolled in an academic institution (or graduated within the last 18 months) to apply.
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