Circuit Integration and Global Methodology Design Engineer
Job Description: The Intel Custom Foundry group within TMG chartered to serve new products is looking for qualified candidate with alignment and experience in the required areas described below to join its Circuit Integration and Global Methodology design team. The key function is circuit methodology, simulation, integration and optimization expertise that involves diverse circuit types to be used in target customer products.
Candidate must have a minimum of MSEE or CE with 4+ years of overall experience.
- 1-3 years of experience in circuit design and optimization on deeply scaled CMOS technologies for performance, power and area on advanced SOC products.
- 1-3 years of experience in circuit design, simulation and modeling challenges across a diversity of circuit types on advanced technology nodes.
- 1-3 years of experience in performance and power sensitivity to design and integration choices, and margin for statistical phenomena at leading-edge nodes.
- Ability to develop, maintain, support, document, and enforce standard cell/ASIC and custom/IP product design and integration methodologies.
- Foundation in digital circuit design as it relates to static timing and noise analysis and verification, and design optimization and constraints.
- Motivated, flexible and open to a variety of tasks, and excellent and demonstrated team player with the ability to work with cross-functional teams.
- Programming proficiency in PERL and/or TCL and working knowledge of VLSI or ASIC design basics, CAD tool flows and verification methods.
Mar 25, 2013
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to final test and optimization, and lastly packaging. Employees in the Technology and Manufacturing group are part of a worldwide network of manufacturing and assembly/test facilities.
We will accept applications/resumes until 60 days after posting date or earlier at Intel's discretion
Intel - 18 months ago
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