Applicant will have design and verification responsibilities for Broadcom's internally developed memory compilers and custom memories including: SRAM, Register File, ROM, One-Time-Programmable, and CAM.
- Transistor-level circuit design and simulation.
- Coordinate macro floorplanning and layout.
- Documentation/application note development and customer support.
- MSEE with 0-3 years experience or PhD with 0+ years experience
- Knowledge of transistor level circuit design and layout
- Knowledge of CMOS fabrication methods and digital circuits
- Experience with memory design and circuit simulation
- Experience with layout parasitic extraction and simulation tools
- Strong written and verbal communication skills
- Experience with Unix shell languages
- Understanding of issues and modeling of variation in deep sub-micron technologies
- Knowledge of verilog modeling
- Familiarity with layout verification tools, design rules, and rule decks
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