Engineer, Staff ASIC Design/Verification
Marvell - Austin, TX

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Strong verification skills including a good knowledge and understanding of different verification methodologies (random vs directed testing, fullchip vs. module-level)
•Strong programming background on System Verilog and UVM.
•Proven experience in developing UVM based Unit, Full-Chip and System Level verification environments
•Experience in developing functional coverage and system verilog assertion -driven verification methodologies
•Experience writing test specifications (plans) and creating directed and random test cases.
•Experience in Gate Level Simulations and debug is a plus
•Knowledge and experience on PLI/DPI and System Verilog testbench methodologies.
•Knowledge of ARM AMBA AXI3, AXI4 and AHB protocols is a must.
•Knowledge of ARM Core architecture is a plus
•Knowledge of unix/linux environment and scripting (perl/tcl)
•MS (EE or CS)
•MS degree and 6 years of experience or a PhD and 3 years of experience or equivalent.
•Self-motivated team player with excellent problem solving and communication skills
Candidate will be a part of the Design Verification team, developing the next generation Marvell Applications Processors based on ARM Cores for Android OS based cellular and handheld markets.
Responsibilities include development of UVM based Unit, Full-Chip and System Level verification environments, functional coverage and system verilog assertion driven methodologies, and mentoring a team of verification engineers on these methodologies.
Engineering - Hardware
Design Verification

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Thou marvell'st at my words, but be thee still; Marvell Technology Group offers digital and mixed-signal integrated circuits for data...