In this position, your responsibilities will include but not be limited to:
The successful candidate requires a strong technical background in micro-architecture design, logic/verification methodology. They need to be someone who is passionate about working in a dynamic environment where the expectation is to contribute in any activity that makes business successful.
- Developing micro-architecture specification or pre-silicon verification for next generation high performance computing MIC architecture (Xeon Phi(TM)). Specific focus area will be one of these: Core/CPU, Power Management, Network Fabric.
- Developing Register Transfer Level (RTL) coding and/or pre-silicon verification environment/test-bench
- Close collaboration with architects, logic designers and circuit designers
Candidate must have strong communication skills (verbal and written), teamwork skills, and the capability of managing a dynamic work environment.
You should possess at least a Master of Science degree in Electrical Engineering, Computer Engineering, or Computer Science. Additional qualifications include:
- Must have at least 3-5 years of Logic Design or Pre-Silicon Verification experience.
- Broad experience in Very Large Scale Integration (VLSI) and Microprocessor or ASIC/SoC design methods.
USA-California, Santa Clara
Dec 10, 2012
Employees in the Intel Architecture Group (IAG) deliver innovative platforms across computing and communication segments including data centers, mobile and desktop personal computers, handhelds, embedded devices and consumer electronics. Intel's industry leading technology is used to create integrated hardware and software solutions such as processors, chipsets, communication radios, graphics processors, motherboards, and networking components that deliver capabilities from security and manageability to computing performance and energy efficiency. IAG employees are at the forefront of enabling a new era of computing that is more integrated into all aspects of our daily lives.
We will accept applications/resumes until 60 days after posting date or earlier at Intel's discretion
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