Low-Power Design Team
is responsible for researching power expenditures and workload efficiency to identify architectural, microarchitectural and implementation strategies to optimize power, performance, area and features. We are actively seeking candidates for multiple Low-Power Design positions at our San Diego, and Austin locations. These positions range from entry-level to Principal/Director, although most do not include functional management responsibilities.
- Research power expenditures and workload efficiency to identify architectural, microarchitectural and implementation strategies to optimize for power, performance and area.
- Evaluate new low-power technologies and analyze their applications to address requirements.
- Perform RTL design, simulation, synthesis, and timing analysis.
- Oversee project schedules, deliverables and documentation.
- Provide feedback for low-power chip and system architecture.
- Understand and perform block & chip-level power analysis.
- Understand and create block-level power models.
- Manage and cultivate engineering talent.
The skills and experience required for this position are as follows:
Qualcomm is the largest fabless design company in the world, generating over $15 Billion in annual revenues from chipsets and royalties from intellectual property and is consistently ranked near the top of Fortune’s “100 Best Companies to work for”. Qualcomm provides hardware, software and related services to nearly every mobile device maker and operator in the global wireless marketplace. Our chipsets power a variety of products; tablets, smartphones, e-readers and other devices, and our digital design team is at the core of all of them. Depending on your technical area, you will be responsible for becoming a subject matter expert and go-to person for other members of your team. The environment is fast-paced and requires cross-functional interaction on a daily basis so good communication, planning and execution skills are a must.
- Understanding of electrical engineering concepts, circuit analysis and logic design skills.
- Familiarity with advanced low power techniques and high speed clocking desired.
- Experience in low power digital ASIC design.
- Programming languages: VHDL, Verilog, Perl, C, C++, C-shell, UNIX.
- Tool Familiarity: Power Artist, PTPX, Synopsys Design Compiler, and simulation.
- Ability to communicate clearly, explain and present complex ideas, organize effectively, lead cross-functional technical teams, and develop engineering talent.
Required: Bachelor's, Computer and/or Electrical Engineering
Preferred: Master's or PhD, Computer and/or Electrical Engineering
Billions, maybe trillions of times a day…
That’s how often people around the world touch something made better by Qualcomm....