Mgr - Engineering
Teradyne - North Reading, MA

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Manage FPGA/ASIC design activities in North Reading. Work with FPGA/ASIC designers to develop project schedules, provide technical oversight. Ensure that good design practices and accepted process and methods are followed. Provide team leadership, motivation and conflict resolution. Present status and work with upper management on development strategies and emerging technologies.

Basic Qualifications, Experience, Skills & Education Required

Degree in EE and/or Computer Science

or equivalent

. Proven hands-on management skills, well developed organizational skills, good people skills, ability to operate in a dynamic changing environment.

Ability to recognize good/bad design practices and intimate knowledge of ASIC and FPGA design flows required. Former experience as an FPGA/ASIC designer desirable. 7 or more years of related experience