The Qualcomm Chip Team is looking for an experienced Verification Engineer to perform integration verification for cores and subsystem at the system level. The Verification Engineer will be responsible for developing and integrating verification environment components, developing testplans from functional specifications, and writing, executing and debugging tests.
You will be contributing to the verification effort of a complex chip, sub-system and/or blocks. You will define chip level verification strategies, test planning, and develop all necessary tools and scripts to enable system-level testing in an automated fashion. You will work with the block/core teams to develop re-use verification. You will verify a core or subsystem at the system level for interactions, connectivity, bus certification for robust verification.
- 3+ years of experience in ASIC/SoC Verification
- Strong knowledge in Object Oriented programming, data structures, and algorithms
- Strong knowledge of HVLs (VERA/e/SystemVerilog), HDLs (Verilog/VHDL), C/C++
- Must have hands-on experience and strong knowledge on HVL methodology (UVM, OVM, VMM, RVM), testbench automation, industry standard bug tracking, and regression mechanisms.
- In-depth knowledge in SoC architecture, including CPUs (preferably ARM), memory subsystems and controllers (PCDDRx), peripherals (PCIe, SATA, Ethernet) , multi-domain clocking, and bus & interconnect structures (preferably as AHB and AXI)
- Must have excellent system debug skills
- Excellent oral and written communication skills
- Ability to work in a team environment
Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering
Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering or equivalent experience
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