Responsibilities:
Chip implementation. eCPU implementation and sign-off. Provide on-site chip implementation support to TSMC major customers. Build up design methodology.
Requirements:
M.S. in EE or CS with 5-10 years experience in physical chip implementation. Proficient in advanced RTL-to-GDS design flow. Hand-on experiences with auto placement and routing tools. Deep understanding of the pros and cons of ASIC vs semi-custom design techniques/methodologies/flows. Familiar with TSMC 65nm and 40nm design rules. Must show proven record in production tapeouts of multi-million gate count large design. Possess design flow and utility program coding capability. Possess innovation at P&R design methodology. Customer oriented and willing to interface with customer and discuss specs. Wiling to take tapeout pressure. Capable of working independently.
To learn more about us, please visit us at www.tsmc.com.
TSMC Technology is an Equal Opportunity Employer.
JobHost - 14 months ago
- save job
-
block
